Arthur McMiler 
- The platform supports DOE’s goal of 100 logical qubits running complex workloads by late 2028
- IBM’s best results so far would need about a 230-fold gain in hard operations to meet that mark
- Findings may shape Starling, the fault-tolerant system IBM plans to deliver in 2029
IBM is supplying its 120-qubit Nighthawk processor and pulse-level hardware access to a new quantum error correction co-design platform it launched Thursday with AMD and the Quantum Science Center, a Department of Energy-funded facility at Oak Ridge National Laboratory.
IBM said the initial deployment places its quantum computers beside Umbra, an ORNL high-performance computing system built on AMD Instinct MI355X graphics processing units and fifth-generation AMD EPYC processors. Researchers will use the arrangement to gauge how closely coupled classical and quantum resources can speed error correction work.
What Capabilities Is Nighthawk Bringing to the Co-Design Platform?
The Nighthawk processor connects its qubits in a square lattice and pairs real-time pulse control with what the company describes as industry-leading circuit throughput. It is designed to enable teams to run competing error correction methods and compare how many qubits and samples, and how much time and classical computing, each one consumes. The comparisons are meant to show where GPU acceleration from Umbra’s AMD nodes helps most.
IBM is also opening its Quantum System API to the researchers. The interface is geared to enable users to measure qubits partway through a calculation and react to the readings immediately, set exact timing for signals that shield qubits from noise, verify what the hardware executed and handle raw measurement data. IBM said next-generation error correction research depends on combining these functions on machines with enough scale to evaluate real codes.
“The question is no longer if error correction will work on quantum hardware,” said Jay Gambetta, IBM fellow and director of IBM Research. “Today, the question is how to accelerate and optimize error correction to build systems that scientists can use to tackle meaningful problems.”
How Does the Platform Support DOE’s Quantum Genesis Mission?
The research aligns with DOE’s Quantum Genesis effort, whose Q Competition seeks 100 logical qubits capable of 100,000 hard operations by the end of 2028. IBM said its experiments have demonstrated 438 hard operations on as many as 70 logical qubits, with results posted to the Quantum Advantage Tracker. Reaching the DOE benchmark would require the field to lift hard operation counts about 230 times.
DOE opened the Q Competition with up to $215 million in available awards, including a $100 million pool for systems that achieve at least 100 logical qubits.
According to IBM, hitting the 2028 objective calls for workflows that join quantum processors with error correction approaches relying on classical high-performance computing. Those workflows will need concatenated and space-time codes, decoders tuned to specific algorithms, circuit compilation and optimization matched to the hardware, and orchestration software, all combined in one stack.
What Roles Do Oak Ridge and AMD Play?
The platform will also link to the Oak Ridge Leadership Computing Facility in Tennessee, giving the partners a way to study quantum computing as one part of a wider environment spanning AI and science. AMD hardware provides the classical foundation for work on error correction, decoder optimization and software orchestration. The partners plan to explore how later generations of AMD processors, networking gear and open software tools might advance alongside quantum machines.
DOE separately partnered with AMD and Hewlett Packard Enterprise to build two AI supercomputers at ORNL.
“With Umbra, we will now test new ideas, evaluate approaches at scale, and build the foundation for more reliable quantum computers,” said Travis Humble, QSC director.
Mark Papermaster, AMD executive vice president and chief technology officer, called the platform “an important step toward building the scalable, efficient computing infrastructure needed to make fault-tolerant quantum computing a reality.”
How Does the Platform Build on Earlier IBM Collaborations?
IBM already works with ORNL through the Quantum Science Center, one of DOE’s National Quantum Information Science Research Centers, which ORNL leads under the National Quantum Initiative. Earlier in 2026, the two organizations reported results from workloads split between quantum computers and ORNL’s Frontier supercomputer. The workloads modeled actual magnetic materials and determined molecular configurations for a material considered promising for fusion fuel production.
With AMD, IBM runs the classical diagonalization step of sample-based quantum diagonalization, a quantum-centric supercomputing workflow, on AMD GPUs. In 2025, the companies also demonstrated an algorithm for efficiently decoding quantum errors on AMD chips.
What Could the Work Mean for IBM’s Starling Roadmap?
IBM said lessons on error correction and HPC workflows could guide its route to IBM Quantum Starling, its first fault-tolerant quantum computer. The lessons could also inform future supercomputers that combine what the company calls superintelligence with HPC. IBM’s roadmap targets Starling for 2029 at the company’s Poughkeepsie, New York, site, where it expanded its quantum data center in 2024.
What Other Quantum Initiatives Is IBM Pursuing?
In May, the Commerce Department selected IBM and eight other companies for more than $2 billion in CHIPS and Science Act quantum incentives. IBM’s share supports Anderon, a quantum foundry it established. IBM and Cisco are developing technology to network large-scale fault-tolerant quantum computers and are aiming for a proof-of-concept by 2030. IBM is also working with Illinois on a planned National Quantum Algorithm Center in Chicago.
IBM Quantum is a founding member of the Post-Quantum Cryptography Coalition, which released a workbook to help organizations inventory cryptographic assets before migrating to quantum-resistant systems.
